802 11AC - OPeration

- ACS(automatic Channel Selection)
- Adjust the HT Max MPDU based on VHT capabilities
 If VHT max MPDU is 8K or 11K, set HT AMSDU to 8K else to 4K.
- Prepare Beacon and Probe Response packets with VHT Capabilities IE and VHT Operation IE
- Start beaconing




Operation:
Channelisation - Based on the country code, channel are fetched from the regulatory domain


1. Prepare list 80MHz channels - Hard code the channel OR get them from  the frequency band of the reg domain
        - Start with chn  = lowfreq + 30.
        - chan >= lowfreq && chan =< highgreq - 30, then chan is 80Mhz
        - Hop to next freq chan+80


2. Similerly prepare list of 160Mhz channels out of freq bands.


3. If user has configured any operating channel and bandwidth, get the centre_freq1 and centre_freq2
pass the same information to FW.




1. Processing Assoc Request and Responding with Assoc Response
   
STA and AP need not have same transmitting and receving capabilities. Example STA may have 1x1 and AP may be 3x3.
Before sending assoc response to STA, assoc req needs to be parsed


A)    Intersection of Tx and Rx rates[MCS set].
     - TX MCS set of AP is intersected with RX MCS set of STA,


           TX AP       RX:STA
1SS     0-9             0-7
2SS     0-9              NA
3SS     0-9              NA


After intersection only MCS set 0-7 for 1SS is selected for transmitting frame to that STA


b) Channel width: Minimum bandwidth value of AP bandwidth and STA bandwidth is selected as bandwidth for Rx/Tx with that STA

Network Driver - NIC commnunication( Data Path)

How to Communicate between Driver and NIC

 

http://www.cubrid.org/blog/dev-platform/understanding-tcp-ip-network-stack/

Communication between a driver and the NIC is the bottom of the stack and most people do not care about it. However, the NIC is executing more and more tasks to solve the performance issue. Understanding the basic operation scheme will help you understand the additional technology.
A driver and the NIC asynchronously communicate. First, a driver requests packet transmission (call) and the CPU performs another task without waiting for the response. And then the NIC sends packets and notifies the CPU of that, the driver returns the received packets (returns the result). Like packet transmission, packet receiving is asynchronous. First, a driver requests packet receiving and the CPU performs another task (call). Then, the NIC receives packets and notifies the CPU of that, and the driver processes the received packets received (returns the result).
Therefore, a space to save the request and the response is necessary. In most cases, the NIC uses the ring structure. The ring is similar to the common queue structure. With the fixed number of entries, one entry saves one request data or one response data. The entries are sequentially used in turn. The name "ring" is generally used since the fixed entries are reused in turn.
As following the packet transmission procedure shown in the following Figure 8, you will see how the ring is used.

 

The driver receives packets from the upper layer and creates the send descriptor that the NIC can understand. The send descriptor includes the packet size and the memory address by default. As the NIC needs the physical address to access the memory, the driver should change the virtual address of the packets to the physical address. Then, it adds the send descriptor to the TX ring (1). The TX ring is the send descriptor ring.
Next, it notifies the NIC of the new request (2). The driver directly writes the data to a specific NIC memory address. In this way, Programmed I/O (PIO) is the data transmission method in which the CPU directly sends data to the device.
The notified NIC gets the send descriptor of the TX ring from the host memory (3). Since the device directly accesses the memory without intervention of the CPU, the access is called Direct Memory Access (DMA).
After getting the send descriptor, the NIC determines the packet address and the size and then gets the actual packets from the host memory (4). With the checksum offload, the NIC computes the checksum when the NIC gets the packet data from the memory. Therefore, overhead rarely occurs.
The NIC sends packets (5) and then writes the number of packets that are sent to the host memory (6). Then, it sends an interrupt (7). The driver reads the number of packets that are sent and then returns the packets that have been sent so far.
In the following Figure 9, you will see the procedure of receiving packets.

First the driver allocates the host memory buffer for receiving packets and then creates the receive descriptor. The receive descriptor includes the buffer size and the memory address by default. Like the send descriptor, it saves the physical address that the DMA uses in the receive descriptor. Then, it adds the receive descriptor to the RX ring (1). It is the receive request and the RX ring is the receive request ring.
Through the PIO, the driver notifies that there is a new descriptor in the NIC (2). The NIC gets the new descriptor of the RX ring. And then it saves the size and location of the buffer included in the descriptor to the NIC memory (3).
After the packets have been received (4), the NIC sends the packets to the host memory buffer (5). If the checksum offload function is existing, the NIC computes the checksum at this time. The actual size of received packets, the checksum result, and any other information are saved in the separate ring (the receive return ring) (6). The receive return ring saves the result of processing the receive request, i.e., the response. And then the NIC sends an interrupt (7). The driver gets packet information from the receive return ring and processes the received packets. If necessary, it allocates new memory buffer and repeats Step (1) and Step (2).
To tune the stack, most people say that the ring and interrupt setting should be adjusted. When the TX ring is large, a lot of send requests can be made at once. When the RX ring is large, a lot of packet receives can be done at once. A large ring is useful for the workload that has a huge burst of packet transmission/receiving. In most cases, the NIC uses a timer to reduce the number of interrupts since the CPU may suffer from large overhead to process interrupts. To avoid flooding the host system with too many interrupts, interrupts are collected and sent regularly(interrupt coalescing) while sending and receiving the packets

RSS and RPS

Receive Side Scaling and Receive Packet Steering

 http://balodeamit.blogspot.in/2013/10/receive-side-scaling-and-receive-packet.html

 

Network commands

              Mutlicast - Mutlicast Teset using iperf
                    STA DUT
                           - mcsctl -s br-lan route flood
                           - echo 0 > /sys/devices/virtual/net/br-lan/bridge/multicast_snooping
                    STA back end - run iperf server
                           - route print
                           - route add 224.0.0.0 MASK 240.0.0.0 IF <if id> <ifterface ip(192.168.1.40>
                           - route add 225.0.0.0 MASK 255.0.0.0 IF <if id> <ifterface ip(192.168.1.40>
                           - make sure above routes are added using 'route print'
                           - iperf -s -u -i 1 -B <mcast group add(225.0.0.10)>
                    AP Back end - run iperf client
                           -  Enable mcast enhancement:
                               - iwpriv ath0 mcastenhance 5
                           -  From AP Dut console check that mcast group ip(225.0.0.100) is updated.
                               - mcsctl -g br-lan mdbtbl 20
                           -  iperf -c <multicast group ip(225.0.0.10)> -u -i 1 -t 100 -B <interface ip(192.168.1.55> -b 5M
                           -  Make sure server is receiving the traffic.

Ethernet Header:

6 bytes: Dest mac address
6 bytes: src mac address
2 bytes: Type

IP Header: